Design an alarmclock cum stop watch using FPGA by zhangkun1020

I have a project which is to design an alarmclock cum stop watch by using Xilinx board and VHDL codes.The time could be set by a numeric keypad or keyboard and display on the LCD. I have already bought the Xilinx board which the model is Spartan-3A… (Budget: $250-$750 USD, Jobs: Verilog / VHDL)